VLSI Implementation Services:

From MPC79 to MOSIS and Beyond


A VLSI Archive Page compiled by Lynn Conway

[V 7-30-13]


This page documents the rapid ternational diffusion of the chip-prototyping infrastructure that had been innovated and demonstrated in MPC79.


Shortly after its successful demonstration in MPC79, the Xerox PARC MPC implementation-system technology was transferred to USC-ISI to start-up the MOSIS service, with initial funding provided by DARPA. Similar efforts soon followed in Australia (AusMPC), the UK, Germany (E.I.S. project), the Nordic countries (NORCHIP), France (CMP) and later on in Europe as a whole (EUROCHIP).


This group of services has enhanced the creativity and productivity of digital designers and CAD developers ever since, by providing the VLSI community with easy access to efficient, economical, quick-turnaround prototyping of chip designs. 


We're now gathering up documentation regarding the founding of these services, for posting in this site. As an example, see the report:


"Australia's First Multi-Project Chip Implementation System", by J. C. Mudge and R. J. Clarke, Microelectronics '82: A National Conference on Microelectronics, Adelaide, South Australia, 12-14 May, 1982.  (6p; 4.5mb PDF)


See also Prof. Reiner Hartenstein's "History of the E.I.S. Project", where you'll also learn how E.I.S. led to the EUROCHIP project. Prof. Christer Svensson has also provided nformation about the formation of the NORCHIP project in the Nordic countries:


More reports will be added soon, as we make contact with folks involved in establishing the various services. (...TBD...)




MPC79: The innovation of a new infrastructure for implementing systems in silicon 

Technology transfer to USC-ISI to start-up the MOSIS service in the U.S.

Development of MPC79/MOSIS infrastructure in other countries

Australia: AusMPC

Germany: E.I.S.

Nordic Countries


France: CMP






MPC79: The innovation of a new infrastructure for implementing systems in silicon: 

Following the success of her M.I.T '78 VLSI design course, Lynn Conway sought ways to dramatically scale up internet access to quick-turnaround chip prototyping, in order to enable wider testing, refinement and evaluation of the new Mead-Conway design methods. In the spring of 1979 she conceived of a new type of internet-based implementation infrastructure for this purpose, and announced its availability to students taking Mead-Conway courses in the fall of '79. 

In a crash-effort that summer at PARC, Alan Bell and Martin Newell created a software prototype of this new form of "MPC System". Lynn's team used the system to support rapid prototyping of student design projects at many universities that fall, in a large-scale experimental demonstration-trial of the new VLSI design and implementation methods called "MPC79".

MPC79 played a vital role in the rapid evolution and validation of the Mead-Conway design methods, and the rapid propagation of the methods into over 100 universities and scores of startup companies within just a few years. It also triggered the rapid spread of MPC79-type chip prototyping infrastructure.


Technology transfer to USC-ISI to start up the MOSIS service in the U.S.:

Following the success of MPC79, Bert Sutherland, Lynn Conway, Alan Bell and Ted Strollo at Xerox PARC coordinated with Keith Uncapther, Danny Cohen and George Lewicki at the University of Southern California's Information Sciences Institute (USC-ISI), to initiate the transfer of the promising new MPC implementation system technology to ISI, where it could be operated on an ongoing basis with government funding. The technology transfer was completed during the following year, with ISI then taking over the ongoing operation of the service in support of university students and researchers. This new chip prototyping infrastructure became known as the MOSIS service, and was supported by DARPA (and later NSF) funding for decades thereafter.


The MOSIS service has provided QTA prototyping of chip designs for university students and researchers ever since, playing an important role in the emergence of many innovative chip designs and design tools. The widespread adoption of the new internet-based implementation methods in the universities also triggered the emergence of many "silicon foundry services" in the 80's, for QTA prototyping and short-run manufacturing in the commercial sector.


Development of MPC/MOSIS infrastructure in other countries:


In parallel with the transfer of the MPC79 technology to form MOSIS (at USC-ISI), Lynn Conway's Xerox-PARC team assisted researchers in a number of other countries in their efforts to establish similar chip-protyping infrastructure. This section documents the start-ups of a number of such services:















Australia: The CSIRO VLSI Research Program and the AusMPC project


During 1981, Dr. J. Craig Mudge founded a new VLSI Research Program at CSIRO (the Australian equivalent of NSF). The CSIRO program sponsored research in VLSI design and design tools, supported adoption of Mead-Conway methods and tools in Australian universities, and developed a national chip-prototyping infrastructure - based on the MPC79 model - to support the emerging chip design community there. For photos from the first run of the system, see the following page:

The CSIRO VLSI Research Program and AusMPC: Photographs from 1982.

Dr. Mudge chaired the program for a National Conference on Microelectronics, held in Adelaide on May 12-14, 1982, to help coalesce Australian VLSI design and CAD activities. The conference included a number of presentations about the new CSIRO program and the first run of its "AusMPC" implementation service, bringing the service to wide attention in Australian high-technology circles.


Following are links to several key papers from that conference, including (i) Craig Mudge's overview of the AusMPC service, (ii) Alan Bell's tutorial on the Xerox PARC MPC system (by then transferred to begin MOSIS), (iii) a discussion by Kamran Eshraghian and David Pucknell of the implications of the new VLSI design and implementation methods on Australian university education in microelectronics, and (iv) a presentation by J.A. Lipman of VLSI Technology, Inc., on the intensive courses VTI was offering the design community - courses that enabled many digital designers to quickly get up to speed on the new methods.

Microelectronics '82: A National Conference on Microelectronics, Adelaide, South Australia, 12-14 May, 1982. (Front-matter, including table of contents, list of invited speakers, etc.)  (7p; 1.2mb PDF)

"Australia's First Multi-Project Chip Implementation System", by J. C. Mudge and R. J. Clarke.  PDF (6p; 4.5mb)

"The Implementation of VLSI Systems", by A.G. Bell.  (5p; 1.6mb PDF)

"Design for VLSI - An Undergraduate Teaching Program", by K. Eshraghian and D.A. Pucknell.  (3p; 1.0mb PDF)

"VLSI Training - Ehancing the Silicon Broker/Foundry Concept", by J.A. Lipman. (4p; 1.4mb PDF)

There were a number of international attendees at this conference, and Craig Mudge's CSIRO report encouraged them to consider development of similar infrastructures in their own countries.


News of these developments in Australia was further disseminated in articles such as "Australia Leaps into the Silicon Age", in the first issue of the Integration: The VLSI Journal.




Germany: The E.I.S. project:


During a trip to attend the Design Automation Conference in 1979, Prof. Dr.-Ing. Reiner Hartenstein of the Technische Universität Kaiserslautern met with both Mead and Conway and learned in some detail about their design methods. Hartenstein returned home enthusiastic about the possibilities of bringing the new methods to Germany. He initiated the teaching of modern VLSI design courses in Germany, offering the first regularly scheduled Mead & Conway university course "on the continent" in the summer semester of 1979 (at the CS department, University of Kaiserslautern).


In the summer of 1980 Hartenstein wrote an article in Elektronische Rechenanlagen in which he discussed the MPC79 innovations in detail (including many key diagrams and photos), and he advocated for establishment of a similar infrastructure in Germany (see the following reprint of that article, filed as an internal report at TUK):

"VLSI Bausteine in geringen Stuckzahlen fur Spezial-anwendungen", Reiner W. Hartenstein, Elektronische Rechenanlagen, Jahrg. 22, H.4 (August 1980).

That article rapidly spread the news of the recent innovations in the U.S., and Hartenstein went on to successfully lobby for and pioneer the development of similar chip-protyping infrastructure in Germany. The resulting E.I.S. service was very productive, and led to the eventual development of the EUROCHIP service (see below).


Hartenstein has posted a "History of the E.I.S. Project" in his website; here are some excepts from this interesting story:

"E.I.S. (Entwurf Intergierter Schaltungen) has been the name of the German Mead & Conway style multi university VLSI design project including a multiproject chip organization. The E.I.S. project has been funded by the German Minister of Research and Technology (BMFT) from 1983 thru 1989. E.I.S. has been the forerunner of the EUROCHIP organisation funded later by the Commission of the European Union.

On the way home from a business trip to San Diego for DAC 1979 Prof. Hartenstein visits Prof. Carver Mead at Caltech, Pasadena, California.

Also in 1979 at a party in Berkeley Prof. Hartenstein gets introduced to Dr. Lynn Conway (head of the VLSI Lab at PARC). A few days later he holds in hands the prepublication copies of the first 4 chapters of the forthcoming book "C. Mead, L. Conway: Introduction to VLSI Systems", which appeared mid' 1980 from Addison Wesley 1980.

During summer semester 1979 Prof. Hartenstein holds his first Mead-&-Conway style graduate couse (exercises included) "Einführung in den VLSI-Entwurf" at the University of Kaiserslautern - as the first "on the continent" (Europe and Asia). Only in UK, off shore from continent, a colleague did it half a year earlier.

In February 1980 Prof. Hartenstein sends a VLSI multi university project proposal to Regierungs-Direktor Dr. Hamacher at BMFT (German Ministry of Research and Technology) . . . (for more, see Reiner's history page). . .

Toward the end of 1983 a grant of about 30 million Deutschmark has been approved to run the multi university E.I.S. project for 3 years. In 1987 the E.I.S. project has been extended by another 18 months with a second grant.

Around 1989 the EUROCHIP organization has been set up after extensive lobbying activities by Prof. Hartenstein and by Dr. Woelcken."

For an overview of the later EUROCHIP project and a discussion of its impact, see the report in the section on "Europe and beyond".


For additional background, see "Early EDA Innovations in Europe driven by Lynn Conway’s Lambda Notation", by Reiner Hartenstein.




The Nordic Countries: The NORCHIP project:


Professor Christer Svensson has provided the following information and links regarding the beginning of Mead-Conway courses at Linköping University in Sweden, and the formation of the NORCHIP project for quick turnaround implementation of chip designs in the Nordic countries:

"University chip design in Sweden, the Nordic countries, and Europe", Historical Notes by Christer Svensson, Feb. 28, 2011.

"NORCHIP, a silicon brokers model", by Ole Olesen, Technical University of Denmark, and Christer Svensson, Linköping, University, Sweden, Integration, the VLSI Journal, Vol. 2, Issue 1, March 1984, Pages 3-13 (6.4mb PDF)

"A CMOS Design Manual", by Christer Svensson and Rolf Sundblad, LSI Design Center, Linköping University, Third Edition, August 1982. (7.9mb PDF)

NORCHIP History (excerpt):

"On the initiative of the professors Ole Olesen and Christer Svensson from Technical University of Denmark and Linköping University respectively and with support from NORDFORSK  NORCHIP was formed in 1981 as a Nordic Multi Project Chip organization. The very first run was processed in 1982 with ten designs originating from research groups in Sweden, Finland, Denmark and Norway. Until 1989 92 process runs were completed with more than 2000 designs originating from academia and enterprises.

In 1988, the CEC launched a call for tenders to select a consortium to serve European universities for a number of services including multi project chip fabrication. As a result, the EUROCHIP organization was set up including NORCHIP, CMP from France, the German National Research Center for Computer Science (GMD), the Inter-University Center for Microelectronics (IMEC) in Belgium, and the Rutherford Appleton Laboratory (RAL) in the UK. Later, EUROCHIP issued a call for tenders towards vendors in 1989, and the service started in 1990.

From 1990 NORCHIP continued the conferences as a Nordic forum for the presentation and discussions of recent advances in design and prototyping of VLSI circuits and systems. The conference brought together experts and leaders from industry and academia to exchange ideas, concepts and results of design, verification, prototyping and testing of VLSI circuits and systems."



France: The CMP project (Circuits Multi-Projets)


Another important early MPC service was developed in France in 19xx by - - -  (TBD) .


From the CMP Website:

"CMP is a service organization in ICs and MEMS for prototyping and low volume production. Circuits are fabricated for Universities, Research Laboratories and Industrial companies. Advanced industrial technologies are available in CMOS, BiCMOS, SiGe BiCMOS, P-HEMT E/D GaAs, etc. CMP distributes and supports several CAD software tools for both Industrial Companies and Universities. Since 1981 6700 circuits for Research, Education and Industry have been fabricated. 381 academic centres and 141 industrial companies from 53 countries have been served."




U.K.:  (...TBD...)




Europe and beyond: The EUROCHIP project:

Building on the success of the E.I.S. project in Germany, Reiner Hartenstein and Klaus Woelcken lobbied for development of a larger-scale European-wide system. Such a system was developed, and came to be known as the EUROCHIP project. The following '96 report by David Broster gives an overview of the scale and impact of the resulting project:


"Stimulating the take-up of Microelectronic Solutions" by David Broster, Technology for Components and Subsystems, DGIII-F3. Presented at the Third IEEE International Conference on Electronics, Circuits & Systems '96, Rhodos Greece - October 1996.


Here are some excerpts from Broster's report:


"To exploit the full potential of microelectronics technologies requires a considerable investment in producing highly qualified engineers. In the early 90's European industry identified an impending shortage of engineers practically equipped to meet the demand to design application specific microelectronics components. In response, the European Commission launched and supported a Pan-European graduate and post-graduate learning programme called EUROCHIP (1992-5). EUROCHIP provided universities with a comprehensive, affordable set of commercial design tools and co-ordinated multi-project access to silicon. Students were able to gain practical experience with real silicon experiments. The following impressive statistics illustrate the impact of the 4 year 18.7 Mecu EUROCHIP action :


    417 academic institutions participated;

    ~15,000 students a year trained, ~1000 to an advanced level;

    16,000 copies of 20 different CAD packages distributed;

    >200 multi project wafer batches fabricated - containing some 2700 circuits.


The success of the EUROCHIP approach provided an opportunity to offer assistance to a number of extraEuropean initiatives which, in turn, were able to gain enormous benefit from the European experience. ESPRIT provided support and links for activities in Latin American (IBERCHIP) and Central and Eastern European countries (EUROEAST). In both cases help was provided for establishing regional microelectronics support and design centres, distribution of design packages, education and training for students, and technology transfer to industrial microelectronics users.


IBERCHIP running from 1994-6, established some 28 centres and nodes in Brazil, Mexico, Argentina and Columbia with secondary nodes in Chile, Uruguay, Venezuela, Ecuador and the Dominican Republic. Whilst EUROEAST (1994-97) established some 30 centres and nodes in Romania, Poland and the Slovak Republic, Hungary, Czech Republic, Bulgaria, Estonia, Ukraine, Russia, Latvia, Lithuania, and Slovenia. Of course, bootstrapping the learning process in these countries has the positive side-effect of encouraging the development of potential future markets for European industry.


Building and expanding on the EUROCHIP experience, ESPRIT launched EUROPRACTICE in October 1995. EUROPRACTICE is designed to cover a broad range of systems orientated technologies and its services are targeted not only to academia but also to all types of industrial users. EUROPRACTICE services include training, design packages and access to prototype manufacturing for a broad range of microelectronics technologies, chip and subsystem packaging, and microsystems. Specific training and service needs are identified through industrial surveys and are being satisfied through close collaboration with software and manufacturing service providers."



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