A Guide to LSI Implementation
Robert W. Hon and Carlo H. Sequin (Editors)
SSL-79-7 January 1980
© Copyright 1980 by R. W. Hon and C. H. Sequin. All Rights Reserved
PALO ALTO RESEARCH CENTER
3333 Coyote Hill Road / Palo Alto / California 94304
This page provides background on and contents of "A Guide to LSI Implementation", 2nd Edition PDF (182p, 7.0mb)
A VLSI Archive Page compiled by Lynn Conway [V 11-15-07].
This guidebook was developed for use by students, student-project coordinators and instructors participating in the Mead-Conway VLSI design courses in the fall of 1979 (i.e., the courses that led up to the QTA implementation of the MPC79 multi-university multi-project chips). Drafts of the guidebook were aimed at providing those involved with the essential technical information required for successfully implementing their chip design projects via the remote implementation service at Xerox PARC (accessed via the internet).
Soon after the success of MPC79, the guide was published as a Xerox PARC technical report (in January 1980), and thereafter used in almost all the universities offering Mead-Conway design courses in the early '80s (over 110 universities by '82-'83). It provided students (and especially the courses' student-project coordinators) with streamlined information on the interface to maskmaking and wafer fabrication services such as those used by the MPC79 and MPC580 multi-university multi-project chip runs.
Edited by Robert Hon and Carlo Sequin, the guidebook contained a wealth of knowledge about quick turnaround (QTA) chip prototyping - knowledge innovated by members of the Mead-Conway research teams at Xerox PARC and Caltech during the late 70's, especially during and immediately following Lynn Conway's MIT '78 VLSI design course during the period leading up to MPC79. The widespread adoption of these new implementation methods in the universities presaged the emergence of "silicon foundry services" in the 80's (services for QTA prototyping and short-run manufacturing).
The guidebook included the detailed specification of CIF 2.0, contributed by Robert F, Sproull and Richard F. Lyon. CIF 2.0 was the intermediate exchange format for chip layout geometry specification used in the university community (and later in the MOSIS service). All the various university CAD tools (of which there were eventually many) translated their outputs into CIF 2.0 layout specifications. Those intermediate specifications could then be translated (by the implementation service) into the proprietary formats used by different maskmaking services.
The guidebook also contained the CIF 2.0 code and color plots of a basic library of cells (input-output pads, PLA's, etc.) designed by Richard F. Lyon, first for M.I.T '78 and then iterated for MPC79. The code and plots for the cells in Dick's cell library were widely transmitted via the internet, and were heavily exploited by the designers participating in MCP79 and subsequent multi-project chip runs. In addition to helping designers by providing sharing common cells needed in many designs, this experience spread news of the ease with which design fragments could be shared when using the Mead-Conway design rules and CIF 2.0 layout specifications - helping trigger more widespread sharing of design fragments (and thus of the underlying design lore and culture) via the internet (which was itself spreading rapidly in the universities at the time).
Hardcopies of the "Guide to LSI Implementation" were sent, along with Lynn Conway's "Guide to the Instructor of VLSI Design", to all the instructors offering VLSI design courses in the early 80's. The implementation guidebook became a key component in the technology transfer of the MPC implementation service from Xerox PARC to USC-ISI, where it became known as the MOSIS service (supported by DARPA funding).
The widespread circulation of these two guidebooks in the universities (along with the Mead-Conway text) helped spread a common technical culture of VLSI design and implementation based on the Mead-Conway methods. The sudden spread of this technical culture among a new generation of university students (beginning in the fall of '79) triggered a revolutionary breakout of entrepreneurial activity in the '80's, as many young entrepreneurs seized opportunities for making major innovations in chip design, CAD tools and related foundry services.
Accessing the guidebook:
You can retrieve a PDF version of the entire 158 page guidebook (7.0 mb) at the following link in Lynn's VLSI Archives. This PDF version is paginated for convenient printing in two-sided page format, as was the original guidebook:
"A Guide to LSI Implementation" PDF (182p; 7.0mb)
The table of contents below links to scanned PDF's of the individual chapters and appendices in the guidebook (including color scans of color plates). When looking for something specific in the guidebook, you can download the relevant chapter from among the links below or in the more detailed list of contents at the link. See also Lynn's VLSI Archive Spreadsheet, for direct links to local sections and chapters in this and many other archive documents.
A Guide to LSI Implementation
Second Edition, 1980, by Hon and Sequin (Eds.)
Table of Contents
1. Introduction 1
2. IC Design Tools 4
3. Silicon Patterning 20
4. Practical Considerations in IC Pattern Preparation 31
5. When the Wafers Are Delivered... 39
6. An Example Starting Frame and Project Chip 50
7. A CIF Primer (by R. F. Sproull and R. F. Lyon) 79
7.1 Definition of CIF 2.0 81
7.2 Ways to Generate CIF 102
7.3 Processing CIF Files 105
A. Optical and E-Beam Mask Specifications 124
B. Index of Manufacturers 132
C. Mann 3000 Pattern Generator Format 133
D. A Basic Library of Symbol Layouts (by R. F. Lyon) 137
E. Additional References 157
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